View HA16114FPJ_6398922.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ha16114p/pj/fp/fpj, ha16120fp/fpj switching regulator for chopper type dc/dc converter description the ha16114p/fp/fpj and ha16120fp/fpj are single-channel pwm switching regulator controller ics suitable for chopper-type dc/dc converters. integrated totem-pole output circuits enable these ics to drive the gate of a power mosfet directly. the output logic of the ha16120 is designed to control a dc/dc step-up (boost) converter using an n-channel power mos fet. the output logic of the ha16114 is designed to control a dc/dc step-down (buck) converter or inverting converter using a p-channel power mos fet. these ics can operate synchronously with external pulse, a feature that makes them ideal for power supplies that use a primary-control ac/dc converter to convert commercial ac power to dc, then use one or more dc/dc converters on the secondary side to obtain multiple dc outputs. synchronization is with the falling edge of the ?ync?pulse, which can be the secondary output pulse from a flyback transformer. synchronization eliminates the beat interference that can arise from different operating frequencies of the ac/dc and dc/dc converters, and reduces harmonic noise. synchronization with an ac/dc converter using a forward transformer is also possible, by inverting the ?ync?pulse. overcurrent protection features include a pulse-by-pulse current limiter that can reduce the width of individual pwm pulses, and an intermittent operating mode controlled by an on-off timer. unlike the conventional latched shutdown function, the intermittent operating function turns the ic on and off at controlled intervals when pulse-by-pulse current limiting continues for a programmable time. this results in sharp vertical settling characteristics. output recovers automatically when the overcurrent condition subsides. using these ics, a compact, highly efficient dc/dc converter can be designed easily, with a reduced number of external components. functions 2.5 v voltage reference sawtooth oscillator (triangle wave) overcurrent detection external synchronous input totem-pole output undervoltage lockout (uvl)
ha16114p/pj/fp/fpj, ha16120fp/fpj 2 error amplifier vref overvoltage protection (ovp) features wide supply voltage range: 3.9 v to 40 v * maximum operating frequency: 600 khz able to drive a power mos fet (? a maximum peak current) by the built-in totem-pole gate pre- driver circuit can operate in synchronization with an external pulse signal, or with another controller ic pulse-by-pulse overcurrent limiting (ocl) intermittent operation under continuous overcurrent low quiescent current drain when shut off by grounding the on/ off pin ha16114: i off = 10 m a (max) ha16120: i off = 150 m a (max) externally trimmable reference voltage (vref): ?.2 v externally adjustable undervoltage lockout points (with respect to v in ) stable oscillator frequency soft start and quick shut function note: the reference voltage 2.5 v is under the condition of v in 3 4.5 v. ordering information hitachi control ics for chopper-type dc/dc converters product channel control functions overcurrent channels number no. step-up step-down inverting output circuits protection dual ha17451 ch 1 mm m open collector scp with timer (latch) ch 2 mm m single ha16114 mm totem pole pulse-by-pulse ha16120 m power mos fet current limiter and dual ha16116 ch 1 mm driver intermittent operation ch 2 m by on/off timer ha16121 ch 1 mm ch 2 m
ha16114p/pj/fp/fpj, ha16120fp/fpj 3 pin arrangement (top view) 116 note: 1. pin 1 (gnd) and pin 8 (p.gnd) must be connected each other with external wire. 215 314 413 512 611 710 8 vref adj db on/off tm cl( - ) v in out 9 gnd* 1 sync r t c t in( - ) e/o in(+) p.gnd* 1 pin description pin no. symbol function 1 gnd signal ground 2 sync external sync signal input (synchronized with falling edge) 3r t oscillator timing resistor connection (bias current control) 4c t oscillator timing capacitor connection (sawtooth voltage output) 5 in(? inverting input to error amplifier 6 e/o error amplifier output 7 in(+) non-inverting input to error amplifier 8 p.gnd power ground 9 out output (pulse output to gate of power mos fet) 10 v in power supply input 11 cl(? inverting input to current limiter 12 tm timer setting for intermittent shutdown when overcurrent is detected (sinks timer transistor current) 13 on/ off ic on/off control (off below approximately 0.7 v) 14 db dead-band duty cycle control input 15 adj reference voltage (vref) adjustment input 16 vref 2.5 v reference voltage output
ha16114p/pj/fp/fpj, ha16120fp/fpj 4 block diagram uvl h l v l v h 16 15 14 13 12 11 10 9 12345678 vref adj db on/off tm cl( - )v in out sync r c in( - ) e/o in(+) p.gnd tt 1.1 v r t + - + nand (ha16114) - + 0.2 v from uvl 1k 1k 0.3v on/off adj v in vref pwm comp from uvl v in 1.6 v 1.0 v from uvl out latch s r q ovp + - * 1 2.5v bandgap reference voltage generator uvl output triangle waveform generator latch reset pulses bias current ea cl 0.3 v gnd note: 1. the ha16120 has an and gate.
ha16114p/pj/fp/fpj, ha16120fp/fpj 5 timing waveforms t = 1 osc 1.6 v typ 1.0 v typ v 0 v in v 0 v in off off off off on on on on on off off off off off on on on on on dead-band voltage (at db) sawtooth wave (at c ) off error amplifier output (at e/o) ha16114 pwm pulse output (drives gate of p-channel power mos fet) ha16120 pwm pulse output (drives gate of n-channel power mos fet) time t note: on duty = t on t generation of pwm pulse output from sawtooth wave (during steady-state operation) t f
ha16114p/pj/fp/fpj, ha16120fp/fpj 6 guide to the functional description the description covers the topics indicated below. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 gnd* 1 sync r t c t in( - ) e/o in(+) p.gnd* 1 vref adj db on/ off tm cl( - ) v in out 1. 2. 3. 4. 5. 6. 7. 8. oscillator frequency (f ) control and synchronization osc dc/dc output voltage setting and error amplifier usage dead-band and soft-start settings output stage and power mos fet driving method vref adjustment, undervoltage lockout, and overcurrent protection intermittent mode timing during overcurrent setting of current limit (top view) note: 1. on/ off pin usage p.gnd is a high-current ( 1 a maximum peak) ground pin connected to the totem-pole output circuit. gnd is a low-current ground pin connected to the vref voltage reference. both pins must be grounded. 1. sawtooth oscillator (triangle wave) 1.1 operation and frequency control the sawtooth wave is a voltage waveform from which the pwm pulses are created (see figure 1). the sawtooth oscillator operates as follows. a constant current i o determined by an external timing resistor r t is fed continuously to an external timing capacitor c t . when the c t pin voltage exceeds a comparator threshold voltage v th , the comparator output opens a switching transistor, allowing a 3i o discharge current to flow from c t . when the c t pin voltage drops below a threshold voltage v tl , the comparator output closes the switching transistor, stopping the 3i o discharge. repetition of these operations generates a sawtooth wave. the value of i o is 1.1 v/r t w . the i o current mirror has a limited current capacity, so r t should be at least 5 k w (i o 220 m a). internal resistances r a , r b , and r c set the peak and valley voltages v th and v tl of the sawtooth waveform at approximately 1.6 v and 1.0 v.
ha16114p/pj/fp/fpj, ha16120fp/fpj 7 the oscillator frequency f osc can be calculated as follows. 1 t 1 + t 2 + t 3 f osc = t 1 = c t (v h - v l ) 1.1 v/r t t 2 = c t (v h - v l ) 3 1.1 v/r t v h - v l = 0.6 v f osc ? 1 0.73 c t r t + 0.8 ( m s) (hz) t 3 ? 0.8 m s (comparator delay time) here, since at high frequencies the comparator delay causes the sawtooth wave to overshoot the 1.6 v threshold and undershoot the 1.0 v threshold, and changes the dead-band thresholds accordingly. select constants by testing under implementation conditions. r t 1 : 4 c t vref v = 1.6 v typ h v = 1.0 v typ l t 1 t 2 t 1 : t 2 = 3 : 1 external circuit 3.2 v (internal voltage) 2.5 v sync r b r c r a 1.1 v current mirror c charging i o t discharg -ing 3i oscillator comparator o sync circuit i o figure 1.1 equivalent circuit of oscillator
ha16114p/pj/fp/fpj, ha16120fp/fpj 8 1.2 external synchronization these ics have a sync input pin so that they can be synchronized to a primary-control ac/dc converter. pulses from the secondary winding of the switching transformer should be dropped through a resistor voltage divider to the sync input pin. synchronization takes place at the falling edge, which is optimal for multiple-output power supplies that synchronize with a flyback ac/dc converter. the sync input pin ( sync ) is connected internally through a synchronizing circuit to the sawtooth oscillator to synchronize the sawtooth waveform (see figure 1.2). synchronization is with the falling edge of the external sync signal. the frequency of the external sync signal must be in the range f osc < f sync < f osc 2. the duty cycle of the external sync signal must be in the range 5% < t 1 /t 2 < 50% (t 1 = 300 ns min). with external synchronization, v th ' can be calculated as follows. f osc f sync v th ' = (v th - v tl ) + v tl note: when not using external synchronization, connect the sync pin to the vref pin. sawtooth wave (f osc ) sync pin (f sync ) synchronized at falling edge v (1.6 v typ) th v (1.0 v typ) tl v th vref 1 v t 1 t 2 figure 1.2 external synchronization
ha16114p/pj/fp/fpj, ha16120fp/fpj 9 2. dc/dc output voltage setting and error amplifier usage 2.1 dc/dc output voltage setting (1) positive output voltage (v o > vref) v in in( - ) in(+) ea gnd vref c l out v o + - r 2 r 1 v in in( - ) in(+) ea gnd vref c l out v o r 2 r 1 + - + - v = vref o r 1 + r 2 r 2 ha16114 with step-down topology ha16120 with step-down (boost) topology + - figure 2.1 output voltage setting (1) (2) negative output voltage (v o < 0 v) v in in( - ) in(+) ea c l out + - r 2 r 1 r vref 3 r 4 + - v = - vref o r + r r 12 2 r r + r 34 3 - 1 ha16114 with inverting topology figure 2.2 output voltage setting (2)
ha16114p/pj/fp/fpj, ha16120fp/fpj 10 2.2 error amplifier usage figure 2.3 shows an equivalent circuit of the error amplifier. the error amplifier in these ics is a simple npn-transistor differential amplifier with a constant-current-driven output circuit. the amplifier combines a wide bandwidth (f t = 4 mhz) with a low open-loop gain (50 db typ), allowing stable feedback to be applied when the power supply is designed. phase compensation is also easy. in( - ) in(+) e/o 40 a 80 a ic internal v in to internal pwm comparator m m figure 2.3 error amplifier equivalent circuit 3. dead-band duty cycle and soft-start settings 3.1 dead-band duty cycle setting the dead-band duty cycle (the maximum duty cycle of the pwm pulse output) can be programmed by the voltage v db at the db pin. a convenient way to obtain v db is to divide the ic? vref output by two external resistors. the dead-band duty cycle (db) and v db can be calculated as follows. v db = vref r 2 r 1 + r 2 db = this applies when v db > v tl . if v db < v tl , there is no pwm output. v th - v db v th - v tl 100 (%) note: v db is the voltage at the db pin. v th : 1.6 v (typ) v tl : 1.0 v (typ) vref is typically 2.5 v. select r 1 and r 2 so that 1.0 v v db 1.6 v. - + + sawtooth wave sawtooth wave voltage at db pin v th v db v tl to vref r r v db db e/o pwm comp from uvl dead band 1 2 v th and v tl vary depending on the oscillator. select constants by testing under implementation conditions. note: figure 3.1 dead-band duty cycle setting
ha16114p/pj/fp/fpj, ha16120fp/fpj 11 3.2 soft-start setting soft-start avoids overshoot at power-up by widening the pwm output pulses gradually, so that the converted dc output rises slowly. soft-start is programmed by connecting a capacitor between the db pin and ground. the soft-start time is determined by the time constant of this capacitor and the resistors that set the voltage at the db pin. v db = vref v x v db r 2 r 1 + r 2 r = r 1 r 2 r 1 + r 2 t soft = - c 1 r ln (1 - ) note: v x is the voltage at the db pin after time t (v x < v db ). - + + to vref r r v x db e/o pwm comp from uvl v th v tl 1.6 v 1.0 v t c 1 soft-start time t soft undervoltage lockout released v db v x uvl sink transistor 1 2 sawtooth wave sawtooth wave figure 3.2 soft-start setting 3.3 quick shutdown the quick shutdown function resets the voltages at all pins when the ic is turned off, to assure that pwm pulse output stops quickly. since the uvl pull-down resistor in the ic remains on even when the ic is turned off, the sawtooth wave output, error amplifier output, and db pin are all reset to low voltage. this feature helps in particular to discharge capacitor c 1 in figure 3.2, which has a comparatively large capacitance. in intermittent mode (explained on a separate page), this feature enables the ic to soft-start in each on-off cycle.
ha16114p/pj/fp/fpj, ha16120fp/fpj 12 4. pwm output circuit and power mosfet driving method these ics have built-in totem-pole push-pull drive circuits that can drive a power mos fet as shown in figure 4.1. the power mos fet can be driven directly through a gate protection resistor. if v in exceeds the gate breakdown voltage of the power mos fet additional protective measures should be taken, e.g. by adding zener diodes as shown in figure 4.2. to drive a bipolar power transistor, the base should be protected by voltage and current dividing resistors as shown in figure 4.3. p.gnd to c l out r g v in bias circuit v o gate protection resistor totem-pole output circuit example: p-channel power mosfet figure 4.1 connection of output stage to power mos fet out gnd v in r g d z v o example: n-channel power mosfet figure 4.2 gate protection by zener diodes out gnd v in v o base discharging resistor base current limiting resistor example: npn power transistor figure 4.3 driving a bipolar power transistor
ha16114p/pj/fp/fpj, ha16120fp/fpj 13 5. voltage reference (vref = 2.5 v) 5.1 voltage reference a bandgap reference built into the ic (see figure 5.1) outputs 2.5 v ?50 mv. the sawtooth oscillator, pwm comparator, latch, and other internal circuits are powered by this 2.5 v and an internally-generated voltage of approximately 3.2 v. the voltage reference section shut downs when the ic is turned off at the on/ off pin as described later, saving current when the ic is not used and when it operates in intermittent mode during overcurrent. on/off + - 1.25 v 1.25 v 25 k w 25 k w v in vref 2.5 v 3.2 v adj sub bandgap circuit main bandgap circuit figure 5.1 vref reference circuit 5.2 trimming the reference voltage (vref and adj pins) figure 5.2 shows a simplified circuit equivalent to figure 5.1. the adj pin in this circuit is provided for trimming the reference voltage (vref). the output at the adj pin is a voltage v adj of 1.25 v (typ) generated by the bandgap circuit. vref is determined by v adj and the ratio of internal resistors r 1 and r 2 as follows: vref = v adj r 1 + r 2 r 2 the design values of r 1 and r 2 are 25 k w with a tolerance of ?5%. if trimming is not performed, the adj pin open can be left open. - + v in vref adj r r 25 k w (typ) 25 k w (typ) 1 2 v bg (bandgap voltage) 1.25 v (typ) figure 5.2 simplified diagram of voltage reference circuit
ha16114p/pj/fp/fpj, ha16120fp/fpj 14 the relation between vref and the adj pin enables vref to be trimmed by inserting one external resistor (r 3 ) between the vref and adj pins and another (r 4 ) between the adj pin and ground, to change the resistance ratio. vref is then determined by the combined resistance ratio of the internal r 1 and r 2 and external r 3 and r 4 . vref = v adj r a + r b r b where, r a : parallel resistance of r 1 and r 3 r b : parallel resistance of r 2 and r 4 although vref can be trimmed by r 3 or r 4 alone, to decrease the temperature dependence of vref it is better to use two resistors having identical temperature coefficients. vref can be trimmed in the range of 2.5 v ?0.2 v. outside this range, the bandgap circuit will not operate and the ic may shut down. vref adj r 1 r 2 internal resistors r 3 r 4 external resistors r a = r 1 r 3 r 1 + r 3 r b = r 2 r 4 r 2 + r 4 figure 5.3 trimming of reference voltage 5.3 vref undervoltage lockout and overvoltage protection the undervoltage lockout (uvl) function turns off pwm pulse output when the input voltage (v in ) is low. in these ics, this is done by monitoring the vref voltage, which normally stays constant at approximately 2.5 v. the uvl circuit operates with hysteresis: it shuts pwm output off when vref falls below 1.7 v, and turns pwm output back on when vref rises above 2.0 v. undervoltage lockout also provides protection in the event that vref is shorted to ground. the overvoltage protection circuit shuts pwm output off when vref goes above 6.8 v. this provides protection in case the vref pin is shorted to v in or another high-voltage source.
! pwm output off pwm output on pwm output off 1.7 2.0 2.5 5.0 6.8 vref pwm output (v) 10 figure 5.4 vref undervoltage lockout and overvoltage protection uvl voltage vref (v typ) v in (v typ) description v h 2.0 v 3.6 v v in increasing: uvl releases; pwm output starts v l 1.7 v 3.3 v v in decreasing: undervoltage lockout; pwm output stops
ha16114p/pj/fp/fpj, ha16120fp/fpj 15 6. usage of on/ off pin this pin is used for the following purposes: to shut down the ic while its input power remains on (power management) to externally alter the uvl release voltage with the timer (tm) pin, to operate in intermittent mode during overcurrent (see next section) 6.1 shutdown by on/ off pin control the ic can be shut down safely by bringing the voltage at the on/ off pin below about 0.7 v (the internal vbe value). this feature can be used in power supply systems to save power. when shut down, the ha16114 draws a maximum current (i off ) of 10 m a, while the ha16120 draws a maximum 150 m a. the on/ off pin sinks 290 m a (typ) at 5 v, so it can be driven by ttl and other logic ics. if intermittent mode will also be employed, use a logic ic with an open-collector or open-drain output. ha16114, ha16120 gnd v in i in tm on/off v in vref output to other circuitry vref reference to latch r b r a c on/off + - switch 10 k w 3v be q 1 q 3 off on external logic ic on/off hysteresis circuit q 2 figure 6.1 shutdown by on/ off pin control 6.2 adjustment of uvl voltages (when not using intermittent mode) these ics permit external adjustment of the undervoltage lockout voltages. the adjustment is made by changing the undervoltage lockout thresholds v th and v tl relative to v in , using the relationships shown in the accompanying diagrams. when the ic is powered up, transistor q 3 is off, so v on is 2v be , or about 1.4 v. connection of resistors r c and r d in the diagram makes undervoltage lockout release at: v in = 1.4 v r c + r d r d this v in is the supply voltage at which undervoltage lockout is released. at the release point vref is still below 2.5 v. to obtain vref = 2.5 v, v in must be at least about 4.3 v. since v on/ off operates in relation to the base-emitter voltage of internal transistors, v on has a temperature coefficient of approximately ? mv/?. keep this in mind when designing the power supply unit. when undervoltage lockout and intermittent mode are both used, the intermittent-mode time constant is shortened, so the constants of external components may have to be altered.
ha16114p/pj/fp/fpj, ha16120fp/fpj 16 r c r d tm (open) on/off gnd 10 k w v in v in q 1 q 2 q 3 vref output vref generation circuit to other circuitry to latch vref 3 2 1 0 012345 v 1.4 v on v on/off 2.5 v v 4.5 v 3 in on/off hysteresis circuit v 0.7 v off 3v be i in figure 6.2 adjustment of uvl voltages 7. timing of intermittent mode during overcurrent 7.1 principle of operation these ics provide pulse-by-pulse overcurrent protection by sensing the current during each pulse and shutting off the pulse if overcurrent is detected. in addition, the tm and on/ off pins can be used to operate the ic in intermittent mode if the overcurrent state continues. a power supply with sharp settling characteristics can be designed in this way. intermittent mode operates by making use of the hysteresis of the on/ off pin threshold voltages v on and v off (v on ?v off = v be ). the timing can be programmed as explained below. when not using intermittent mode, leave the tm pin open, and pull the on/ off pin up to v on or higher. the v be is base emitter voltage of internal transistors. 390 k w 2.2 k w 2.2 f + - r r c a b on/off on/off tm latch q r s vref reference v in current limiter cl m figure 7.1 connection diagram (example)
ha16114p/pj/fp/fpj, ha16120fp/fpj 17 7.2 intermittent mode timing diagram (v on/ off only) ! " # v be 2v be 3v be *1 v on/off b off on on c 0 v 2t on t off t on t a a. b. c. note: 1. continuous overcurrent is detected intermittent operation starts (ic is off) voltage if overcurrent ends (thick dotted line) v be is the base-emitter voltage of internal transistors, and is approximately 0.7 v. (see the figure 6.1.) ic is on c ic is off for details, see the overall waveform timing diagram. figure 7.2 intermittent mode timing diagram (v on/ off only) 7.3 calculation of intermittent mode timing intermittent mode timing is calculated as follows. (1) t on (time until the ic shuts off when continuous overcurrent occurs) 2v be v be 1 1 - on duty* t on = c on/off r b ln = c on/off r b ln2 ? 0.69 c on/off r b 1 1 - on duty* 1 1 - on duty* (2) t off (time from when the ic shuts off until it next turns on) v in - v be v in - 2v be t off = c on/off (r a + r b ) ln where v be ? 0.7 v the greater the overload, the sooner the pulse-by-pulse current limiter operates, the smaller t on becomes, and from the first equation (1) above, the smaller t on becomes. from the second equation (2), t off depends on v in . note that with the connections shown in the diagram, when v in is switched on the ic does not turn on until t off has elapsed. sawtooth wave point at which the current limiter operates pwm output (in case of ha16114) t t on dead-band voltage note: on duty is the percent of time the ic output is on during one pwm cycle when the pulse-by-pulse current limiter is operating. on duty = 100 (%) t on t where t = t/f osc figure 7.3
ha16114p/pj/fp/fpj, ha16120fp/fpj 18 7.4 examples of intermittent mode timing (calculated values) on t = t c r on 1 on/off b t = 0.69 1 1 1 - on duty on/off b on here, coefficient example: if c = 2.2 f, r = 2.2 k , and the on duty of the current limiter is 75%, then t = 13 ms. from section 7.3 (1) previously. (1) t w m 0 20406080100 0 2 4 6 8 t 1 (pwm) on duty (%) figure 7.4 examples of intermittent mode timing (1) if c = 2.2 f, r = 2.2 k , r = 390 k , v = 12 v, (2) t off t = t c (r + r ) off 2 on/off b t = ln 2 v in - v be v in - 2v be a on/off b t = 55 ms. off ain w here, coefficient from section 7.3 (2) previously. then example: w m 02040 0 0.05 0.1 t 2 v (v) 10 30 in figure 7.5 examples of intermittent mode timing (2)
ha16114p/pj/fp/fpj, ha16120fp/fpj 19 v in c f r f c l ic r cs out v out f.b. v th (cl) v in - 0.2 v v in sawtooth wave v ct dead band v db error output v e/o pwm pulse output (in case of ha16120) power mos fet drain current (i d ) (dotted line shows inductor current) current limiter pin (cl) inductor l example of step-up circuit i d determined by l and v in determined by r cs and r f figure 7.6 8. setting the overcurrent detection threshold the voltage drop v th at which overcurrent is detected in these ics is typically 0.2 v. the bias current is typically 200 m a. the power mos fet peak current value before the current limiter goes into operation is given as follows. i d = v th - (r f + r cs ) i bcl r cs where, v th = v in ?v cl = 0.2 v, v cl is a voltage refered on gnd. note that r f and c f form a low-pass filter with a cutoff frequency determined by their rc time constant. this filter prevents incorrect operation due to current spikes when the power mos fet is switched on or off. r cs v in r f c f i bcl g s d v o 1 k 200 a + - detector output (internal) out cl v in in( - ) to other circuitry 1800 pf + - 240 w 0.05 w note: this circuit is an example for step-down use. m figure 8.1 example for step-down use with the values shown in the diagram, the peak current is: i d = 0.2 v - (240 w + 0.05 w ) 200 m a 0.05 w = 3.04 a the filter cutoff frequency is calculated as follows: f c == 1 2 p c f r f 1 6.28 1800 pf 240 w = 370 khz
ha16114p/pj/fp/fpj, ha16120fp/fpj 20 absolute maximum ratings (ta = 25?) rating item symbol ha16114p/fp, ha16120fp ha16114pj/fpj, ha16120fpj unit supply voltage v in 40 40 v output current (dc) i o 0.1 0.1 a output current (peak) i o peak 1.0 1.0 a current limiter input voltage v cl v in v in v error amplifier input voltage v iea v in v in v e/o input voltage v ie/o vref vref v rt source current i rt 500 500 m a tm sink current i tm 33 ma sync voltage v sync vref vref v sync current i sync 250 250 m a power dissipation p t 680* 1, * 2 680* 1, * 2 mw operating temperature topr ?0 to +85 ?0 to +85 c junction temperature tjmax 125 125 c storage temperature tstg ?5 to +125 ?5 to +125 c note: 1. this value is for an sop package (fp) and is based on actual measurements on a 40 40 1.6 mm glass epoxy circuit board. with a 10% wiring density, this value is permissible up to ta = 45 c and should be derated by 8.3 mw/ c at higher temperatures. with a 30% wiring density, this value is permissible up to ta = 64 c and should be derated by 11.1 mw/ c at higher temperatures. 2. for the dilp package. this value applies up to ta = 45 c; at temperatures above this, 8.3 mw/ c derating should be applied. 800 600 400 200 0 20 40 60 80 100 120 140 0 - 20 680 mw 447 mw 348 mw 45 c64 c85 c 125 c permissible dissipation p (mw) operating ambient temperature ta ( c) 10% wiring density 30% wiring density t
ha16114p/pj/fp/fpj, ha16120fp/fpj 21 electrical characteristics (ta = 25?, v in = 12 v, f osc = 100 khz) item symbol min typ max unit test conditions notes voltage output voltage vref 2.45 2.50 2.55 v i o = 1 ma reference line regulation line 2 60 mv 4.5 v v in 40v 1 section load regulation load 30 60 mv 0 i o 10 ma short-circuit output current i os 10 24 ma vref = 0 v vref overvoltage protection threshold vrovp 6.2 6.8 7.4 v temperature stability of output voltage d vref/ d ta 100 ppm/ c vref adjustment voltage v adj 1.225 1.25 1.275 v sawtooth maximum frequency fmax 600 khz oscillator minimum frequency fmin 1 hz section frequency stability with input voltage d f/f 01 1 3 % 4.5 v v in 40 v (f 01 = (fmax + fmin)/2) frequency stability with temperature d f/f 02 5 % ?0 c ta 85 c (f 02 = (fmax + fmin)/2) oscillator frequency f osc 90 100 110 khz r t = 10 k w c t = 1300 pf dead-band adjustment low level threshold voltage v tl 0.9 1.0 1.1 v output duty cycle: 0% on section high level threshold voltage v th 1.5 1.6 1.7 v output duty cycle: 100% on threshold difference d v th 0.5 0.6 0.7 v d v th = v th ?v tl output source current isource 170 250 330 m a db pin: 0 v pwm comparator low level threshold voltage v tl 0.9 1.0 1.1 v output duty cycle: 0% on section high level threshold voltage v th 1.5 1.6 1.7 v output duty cycle: 100% on threshold difference d v th 0.5 0.6 0.7 v d v th = v th ?v tl note: 1. resistors connected to on/ off pin: tm pin on/off pin w w v pin in 12 13 10 390 k 2 k
ha16114p/pj/fp/fpj, ha16120fp/fpj 22 electrical characteristics (ta = 25?, v in = 12 v, f osc = 100 khz) (cont) item symbol min typ max unit test conditions notes error input offset voltage v io 2 10 mv amplifier input bias current i b 0.5 2.0 m a section output sink current i osink 28 40 52 m av o = 2.5 v output source current i osource 28 40 52 m av o = 1.0 v common-mode input voltage range v cm 1.1 3.7 v voltage gain a v 40 50 db f = 10 khz unity gain bandwidth bw? ?hz high level output voltage v oh 3.5 4.0 v i o = 10 m a low level output voltage v ol 0.2 0.5 v i o = 10 m a overcurrent threshold voltage v th v in ?.22 v in ?.2 v in ?.18 v detection cl(? bias current i bcl(? 140 200 260 m a cl(? = v in section turn-off time t off 200 300 ns 1 500 600 2 uvl section vref high level threshold voltage v th 1.7 2.0 2.3 v vref low level threshold voltage v tl 1.4 1.7 2.0 v threshold difference d vth 0.1 0.3 0.5 v d v th = v th ?v tl vin high level threshold voltage v inh 3.3 3.6 3.9 v vin low level threshold voltage v inl 3.0 3.3 3.6 v notes: 1. ha16114 only. 2. ha16120 only.
ha16114p/pj/fp/fpj, ha16120fp/fpj 23 electrical characteristics (ta = 25?, v in = 12 v, f osc = 100 khz) (cont) item symbol min typ max unit test conditions notes output output low voltage v ol 0.9 1.5 v i osink = 10 ma stage output high voltage v oh1 v in ?.2 v in ?.6 v i osource = 10 ma high voltage when off v oh2 v in ?.2 v in ?.6 v i osource = 1 ma on/ off pin: 0 v 1 low voltage when off v ol2 0.9 1.5 v i osink = 1 ma on/ off pin: 0 v 2 rise time t r 50 200 ns c l = 1000 pf fall time t f 50 200 ns c l = 1000 pf external sync sync source current i sync 120 180 240 m a sync pin: 0 v section sync input frequency range f sync f osc ? osc 2 khz external sync initiation voltage v sync vref ?.0 vref ?.5 v minimum pulse width of sync input pwmin 300 ns input sync pulse duty cycle pw 5 50 % 3 on/off section on/ off sink current 1 i on/ off 1 60 90 120 m a on/ off pin: 3 v on/ off sink current 2 i on/ off 2 220 290 380 m a on/ off pin: 5 v ic on threshold v on 1.1 1.4 1.7 v ic off threshold v off 0.4 0.7 1.0 v on/ off threshold difference d v on/ off 0.5 0.7 0.9 v total operating current i in 6.0 8.5 11.0 ma c l = 1000 pf device quiescent current i off 010 m a on/ off pin: 0 v 1 120 150 m a on/ off pin: 0 v 2 notes: 1. ha16114 only. 2. ha16120 only. 3. pw = t 1 / t 2 100 external sync pulse t 2 t 1
ha16114p/pj/fp/fpj, ha16120fp/fpj 24 characteristic curves 4.0 3.0 2.0 1.0 0.0 01234 4.3v 2.5v 540 reference voltage (v) reference voltage (v) supply voltage (v) reference voltage vs. supply voltage reference voltage vs. ambient temperature ta = 25 c 2.54 2.52 2.50 2.48 2.46 - 20 0 20406080 2.55 max 2.45 min spec v = 12 v in ambient temperature ( c) 2.5 2.0 1.5 1.0 0.5 0.0 100 200 300 400 500 600 ta = 25 c v = 12 v r = 10 k in t w low level threshold voltage of sawtooth wave (v) frequency (khz) 2.5 2.0 1.5 1.0 0.5 0.0 100 200 300 400 500 600 ta = 25 c v = 12 v r = 10 k in t w high level threshold voltage of sawtooth wave (v) frequency (khz) low level threshold voltage of sawtooth wave vs. frequency high level threshold voltage of sawtooth wave vs. frequency
ha16114p/pj/fp/fpj, ha16120fp/fpj 25 oscillator frequency change with ambient temperature (1) oscillator frequency change with ambient temperature (2) error amplifier gain, error amplifier phase vs. error amplifier input frequency 10 5 0 - 5 - 10 - 20 0 20406080 v = 12 v f = 100 khz spec in osc ambient temperature ( c) a vo bw f oscillator frequency change (%) 10 5 0 - 5 - 10 - 20 0 20406080 v = 12 v f = 350 khz in osc ambient temperature ( c) oscillator frequency change (%) 60 40 20 0 1 k 3 k 10 k 30 k 100 k error amplifier gain a vo (db) error amplifier phase f (deg.) error amplifier input frequency f in (hz) 300 k 1 m 3 m 10 m 180 90 0 135 45
ha16114p/pj/fp/fpj, ha16120fp/fpj 26 error amplifier voltage gain vs. ambient temperature current limiter turn-off time vs. current limiter threshold voltage note current limiter turn-off time vs. ambient temperature note current limiter threshold voltage vs. ambient temperature 60 55 50 45 40 - 20 0 20406080 40 db min v = 12 v f = 10 khz in 50 db typ error amplifier voltage gain (db) ambient temperature ( c) 500 400 300 200 100 ta = 25 c v = 12 v c = 1000 pf ha16114 in l 0.1 0.2 0.3 0.4 0.5 300 ns max current limiter turn-off time (ns) cl voltage v in - v cl (v) 0.22 0.21 0.20 0.19 0.18 - 20 0 20406080 0.18 min v = 12 v in 0.22 max ambient temperature ( c) current limiter threshold voltage (v) 300 250 200 150 100 - 20 0 20406080 v = 12 v v = v - 0.3 v c = 1000 pf in cl l 300 ns max th ambient temperature ( c) current limiter turn-off time (ns) 200 ns typ note: approximatery 300 ns greater than this in the case of the ha16120. note: approximatery 300 ns greater than this in the case of the ha16120. ha16114
ha16114p/pj/fp/fpj, ha16120fp/fpj 27 reference voltage vs. ic on/off voltages ic on/off voltages vs. ambient temperature operating current vs. supply voltage peak output current vs. load capacitance 5.0 4.0 3.0 2.0 1.0 0.0 ta = 25 c v = 12 v in 0 0.5 1.0 1.5 2.0 2.5 reference voltage (v) ic on/off voltage (v) spec spec 2.0 1.5 1.0 0.5 0.0 - 20 0 20406080 spec v = 12 v f = 100 khz in osc spec ic on/off voltage (v) ambient temperature ( c) ic off voltage ic off voltage ic on voltage ic on voltage 600 500 400 300 200 100 0 0 1000 2000 3000 4000 5000 ta = 25 c v = 12 v f = 100 khz in osc peak output current (ma) load capacitance (pf) 20 15 10 5 0 ta = 25 c f = 100 khz on duty = 50% c = 1000 pf osc l 010203040 spec operating current (ma) supply voltage (v)
ha16114p/pj/fp/fpj, ha16120fp/fpj 28 operating current vs. output duty cycle 20 15 10 5 0 in osc l spec 0 20 40 80 100 60 operating current (ma) output duty cycle (%) ta = 25 c v = 12 v f = 100 khz c = 1000 pf pwm comparator input vs. output duty cycle (1) 100 0 20 40 60 80 0.6 1.6 1.4 1.2 1.0 0.8 1.8 on duty (%) v db or v e/o (v) ha16114 300 khz 50 khz 600 khz f osc note: the on-duty of the ha16114 is the proportion of one cycle during which output is low. note: the on-duty of the ha16120 is the proportion of one cycle during which output is high. 300 khz 50 khz 100 0 20 40 60 80 0.6 1.6 1.4 1.2 1.0 0.8 1.8 on duty (%) v db or v e/o (v) ha16120 pwm comparator input vs. output duty cycle (2) 600 khz f osc
ha16114p/pj/fp/fpj, ha16120fp/fpj 29 024 810 6 12 1 2 3 9 10 11 0 output voltage v o (v dc ) io sink or io source (ma) ha16114 output high voltage when on output low voltage when on ha16120 output pin (output resistor) characteristics output high voltage when off output low voltage when off vgs (p-channel power mos fet) vgs (n-channel power mos fet)
ha16114p/pj/fp/fpj, ha16120fp/fpj 30 15 10 5 0 400 200 0 - 200 - 400 v out (v) i o (ma) v out (v) i o (ma) 200 ns/div vref db cl( - )v in in(+) c t r t i o c 1000 pf l test circuit out output waveforms: rise of output voltage v out output waveforms: fall of output voltage v out 1300 pf 10 k w vref db cl( - )v in in(+) c t r t i o c 1000 pf l test circuit out 1300 pf 10 k w 15 10 5 0 400 200 0 - 200 - 400 200 ns/div
ha16114p/pj/fp/fpj, ha16120fp/fpj 31 1000 100 10 1 0.1 10 1 10 2 10 3 10 4 10 5 10 6 r t = 3k w r t = 10k w r t = 30k w oscillator frequency f (khz) timing capacitance c (pf) t osc r t = 100k w r t = 300k w r t = 1m w oscillator frequency vs. timing capacitance
ha16114p/pj/fp/fpj, ha16120fp/fpj 32 application examples (1) ! + 12 v dc input - gnd sync r t in( - ) e/o in(+) p.gnd vref adj db ha16114fp on/off tm cl( - )v in out c t 390 k 2 k 2 m - + 4.7 m 15 k 10 k - + - + 0.1 m 10k 560p 130k 470p (gate protection resistor) 50m 220 1800p 47 m h sbd hrp24 + - 560 m 12v + - 5k 5k units: c : f r : w 12 v dc to 5 v dc step-down converter using ha16114fp noise countermeasures: 1 3 4 gds 2 16 13 12 11 10 9 15 14 1 45678 23 5c 5b 5d 5.6 5a 5a 2 3 4 1 5 5a 5b 5c 5d timing circuit for intermittent mode during overcurrent specific tips for high efficiency (see the numbers in the diagram) use a switching element (power mos fet) with low on-resistance. use an inductor with low dc resistance. use a schottky barrier diode (sbd) with low v f . use a low-esr capacitor designed for switching power supplies. separate the power ground from the small-signal ground, and connect both at one point. add noise-absorbing capacitors. ground the bottom of the package with a ground strip. make the output-to-gate wiring as short as possible. dead-band and soft-start circuit 470 m 35 v (noise- absorbing capacitor) small-signal ground ground strip low on-resistance p-channel power mosfet example: 2sj214, 2sj296 overcurrent sense resistor high-saturation-current choke coil example: toko 8r-hb series low-esr capacitor 5 v dc stepped- down output 0.22 m (noise- absorbing capacitor) feedback power ground
ha16114p/pj/fp/fpj, ha16120fp/fpj 33 application examples (2) hra83 external synchronization with primary-control ac/dc converter (1) combination with a flyback ac/dc converter (simplified schematic) commer- cial ac error amp. - + v in out cl(cs) transformer main dc output + - sbd hrp24 1s2076a d r 1 r 2 1s2076a + + - + - v in cl p.gnd out gnd sync ha16114, ha16120 10 11 8 9 1 2 primary ac/dc converter ic (ha16107, ha17384, etc.) 2sj296 + - + - sub dc output sbd hrp24 step-down output (ha16114) a k to a of sbd this is one example of a circuit that uses the features of the ha16114/120 by operating in synchronization with a flyback ac/dc converter. note the following design points concerning the circuit from the secondary side of the transformer to the sync pin of the ha16114/120. diode d prevents reverse current. always insert a diode here. use a general-purpose switching diode. resistors r 1 and r 2 form a voltage divider to ensure that the input voltage swing at the sync pin does not exceed vref (2.5 v). to maintain operating speed, r 1 + r 2 should not exceed 10 k w .
ha16114p/pj/fp/fpj, ha16120fp/fpj 34 application examples (3) input dfg1c8 ha16107, ha16666 etc. switching transformer coil coil coil coil hrw26f sbd module ha17431 and optocoupler feedback section main dc output + - fb 2sc458 r 1 r 2 r 3 6.2k w 510 w 390 w q zd sync v in gnd ha16114, ha16120 other parts as on previous page 1 210 out primary, for main secondary, for output tertiary, for ic for reset v in 9 c d a b c d a b external synchronization with primary-control ac/dc converter (cont.) (2) combination with a forward ac/dc converter (simplified schematic) this circuit illustrates the combination of the ha16114/120 with a forward ac/dc converter. the ha16114/120 synchronizes with the falling edge of the external sync signal, so with a forward transformer, the sync pulses must be inverted. in the diagram, this is done by an external circuit consisting of the following components: q: r 1 and r 2 : r 3 : zd: transistor for inverting the pulses. use a small-signal transistor. these resistors form a voltage divider for driving the base of transistor q. r 2 also provides a path for base discharge, so that the transistor can turn off quickly. load resistor for transistor q. zener diode for protecting the sync pin.
ha16114p/pj/fp/fpj, ha16120fp/fpj 35 overall waveform timing diagram (for application example (1)) v in v , v tm on/off 12 v 0 v 1.4 v 2.1 v v , v tm on/ 1.4 v 0.7 v on on on on off off off off on pulse-by-pulse current limiting 3.0 2.0 1.0 0.0 v sawtooth wave ct v e/o v v , v ct db 12 v 11.8 v 0 v v *1 pwm pulse 12 v 0 v out dc/dc output (example for positive voltage) ic operation status v db power-up ic on soft start steady state overcurrent detected; intermittent operation overcurrent subsides; steady-state operation quick shutdown power supply off, ic off note: 1. this pwm pulse is on the step-down/inverting control channel (ha16114). the booster control channel (ha16120) output consists of alternating l and h of the ic on cycle. off (v) v cl e/o , off 0.0 v
ha16114p/pj/fp/fpj, ha16120fp/fpj 36 application examples (4) (some pointers on use) 1. inductor, power mos fet, and diode connections v in c f r f r cs v in cl out gnd v o v in c f r f r cs v in cl out gnd v o fb fb fb c f r f r cs v in cl out gnd fb c f r f r cs v in cl out gnd v o vref 1. step-up topology 2. step-down topology 4. step-down/step-up (buck-boost) topology 3. inverting topology applicable only to ha16120 applicable only to ha16114 applicable only to ha16114 applicable only to ha16114 2. turning output on and off while the ic is on db e/o off to turn only one channel off, ground the db pin or the e/o pin. in the case of e/o, however, there will be no soft start when the output is turned back on.
ha16114p/pj/fp/fpj, ha16120fp/fpj 37 package dimensions hitachi code jedec eiaj mass (reference value) dp-16 conforms conforms 1.07 g unit: mm 6.30 19.20 16 9 8 1 1.3 20.00 max 7.40 max 7.62 0.25 + 0.13 ?0.05 2.54 0.25 0.48 0.10 0.51 min 2.54 min 5.06 max 0 ?15 1.11 max hitachi code jedec eiaj mass (reference value) fp-16da conforms 0.24 g unit: mm *dimension including the plating thickness base material dimension *0.22 0.05 *0.42 0.08 0.12 0.15 m 2.20 max 5.5 10.06 0.80 max 16 9 1 8 10.5 max + 0.20 ?0.30 7.80 0.70 0.20 0 ?8 0.10 0.10 1.15 1.27 0.40 0.06 0.20 0.04
ha16114p/pj/fp/fpj, ha16120fp/fpj 38 cautions 1. hitachi neither warrants nor grants licenses of any rights of hitachi? or any third party? patent, copyright, trademark, or other intellectual property rights for information contained in this document. hitachi bears no responsibility for problems that may arise with third party? rights, including intellectual property rights, in connection with use of the information contained in this document. 2. products and product specifications may be subject to change without notice. confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. hitachi makes every attempt to ensure that its products are of high quality and reliability. however, contact hitachi? sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. design your application so that the product is used within the ranges guaranteed by hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail- safes, so that the equipment incorporating hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the hitachi product. 5. this product is not designed to be radiation resistant. 6. no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from hitachi. 7. contact hitachi? sales office for any questions regarding this document or hitachi semiconductor products. hitachi, ltd. semiconductor & integrated circuits. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan tel: tokyo (03) 3270-2111 fax: (03) 3270-5109 copyright ? hitachi, ltd., 1998. all rights reserved. printed in japan. hitachi asia pte. ltd. 16 collyer quay #20-00 hitachi tower singapore 049318 tel: 535-2100 fax: 535-1533 url northamerica : http:semiconductor.hitachi.com/ europe : http://www.hitachi-eu.com/hel/ecg asia (singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm asia (taiwan) : http://www.hitachi.com.tw/e/product/sicd_frame.htm asia (hongkong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm japan : http://www.hitachi.co.jp/sicd/indx.htm hitachi asia ltd. taipei branch office 3f, hung kuo building. no.167, tun-hwa north road, taipei (105) tel: <886> (2) 2718-3666 fax: <886> (2) 2718-8180 hitachi asia (hong kong) ltd. group iii (electronic components) 7/f., north tower, world finance centre, harbour city, canton road, tsim sha tsui, kowloon, hong kong tel: <852> (2) 735 9218 fax: <852> (2) 730 0281 telex: 40815 hitec hx hitachi europe ltd. electronic components group. whitebrook park lower cookham road maidenhead berkshire sl6 8ya, united kingdom tel: <44> (1628) 585000 fax: <44> (1628) 778322 hitachi europe gmbh electronic components group dornacher stra b e 3 d-85622 feldkirchen, munich germany tel: <49> (89) 9 9180-0 fax: <49> (89) 9 29 30 00 hitachi semiconductor (america) inc. 179 east tasman drive, san jose,ca 95134 tel: <1> (408) 433-1990 fax: <1>(408) 433-0223 for further information write to:

▲Up To Search▲

Price & Availability of HA16114FPJ

	To Download HA16114FPJ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .